EP2AGZ225FF35C3G vs EP2AGX125EF35C5G Vergleich
Detaillierter Direktvergleich von EP2AGZ225FF35C3G von Altera und EP2AGX125EF35C5G von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2AGZ225FF35C3G | EP2AGX125EF35C5G |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $868,40 | $0,00 |
| Family | Arria II GZ | — |
| Series | Arria II | — |
| Logic Elements (LE) | 225,000 | — |
| Gehäuse | 1152-ball Flip-Chip BGA (FF35) | 1152-BBGA, FCBGA |
| Package Size | 35 mm x 35 mm | — |
| Betriebstemperatur | 0C to +85C (Commercial) | — |
| Speed Grade | C3 | — |
| Transceivers | Up to 16 channels | — |
| Transceiver Data Rate (max) | 6.375 Gbps | — |
| DSP Blocks | [DATA_NEEDED: count] | — |
| Embedded Memory | [DATA_NEEDED: Mbits] | — |
| User I/O Banks | [DATA_NEEDED: count] | — |
| Maximum User I/O | [DATA_NEEDED: pin count] | — |
| Process Technology | 40 nm TSMC | — |
| Memory Controller Support | DDR3, DDR2, QDR II+ | — |
| PCI Express Hard IP | Yes (Gen1/Gen2) | — |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status] |
| Montageart | Surface Mount (BGA) | Surface mount |
| MSL-Level | 3 (per JEDEC J-STD-020) | — |
| Lead-Free | Yes | — |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| FPGA Family | — | Arria II GX |
| Logic Cells | — | 118143 |
| Programmable Bits | — | 8315904 bits |
| I/O Count | — | 452 I/O |
| Package Type | — | FC-FBGA |
| Anzahl der Pins | — | 1152 pins |
| Versorgungsspannung | — | 0.9 V |
| Listed Performance | — | 500 MHz |
| Terminal Form | — | BALL |
| Terminal Count | — | 1152 terminals |
| Package Code | — | HBGA |
| Packaging | — | Tray |
| Betriebstemperaturbereich | — | [DATA_NEEDED: operating temperature range] |
| Configuration Memory | — | [DATA_NEEDED: configuration memory type] |
| Transceiver Count | — | [DATA_NEEDED: transceiver count] |