EP2AGZ350HF40C3G vs EP2AGZ225HF40C3G Vergleich
Detaillierter Direktvergleich von EP2AGZ350HF40C3G von Intel und EP2AGZ225HF40C3G von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP2AGZ350HF40C3G - 350K LE Arria II GZ FPGA, 734 I/O, 1517-FBGA | Intel
EP2AGZ350HF40C3G ✓ AktivIntel
EP2AGZ225HF40C3G - 225K LE Arria II GZ FPGA, 734 I/O, FBGA-1517 | Intel
EP2AGZ225HF40C3G ✓ AktivSpezifikationsvergleich
| Parameter | EP2AGZ350HF40C3G | EP2AGZ225HF40C3G |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.380,00 | $1.450,00 |
| Family | Arria II GZ | Arria II GZ |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements (LEs) | 350,000 | — |
| Embedded Memory | [DATA_NEEDED: total embedded memory bits] | [DATA_NEEDED: total Mbits] |
| DSP Blocks | [DATA_NEEDED: DSP block count and 18x18 multiplier count] | [DATA_NEEDED: count and width] |
| User I/O Pins | 734 | — |
| Gehäuse | 1517-ball FineLine BGA (HF40) | 1517-ball FBGA (HF40) |
| Package Pitch | 1.0 mm | — |
| Process Node | 40 nm | — |
| Speed Grade | C3 (commercial, -3) | C3 |
| Betriebstemperatur | Commercial (0C to 85C, suffix 0C) | Commercial (0C to +85C) |
| Transceivers | Up to 6.375 Gbps (channel count [DATA_NEEDED]) | [DATA_NEEDED: count and max data rate] |
| External Memory Interfaces | DDR3, DDR2, QDR II+ (up to 800 MHz) | — |
| PCI Express Hard Blocks | Yes (Gen1/Gen2) | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| RoHS-Status | Compliant | Compliant |
| Lead-Free | Yes | Yes |
| MSL-Level | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: moisture sensitivity level] |
| Logic Elements | — | 225,000 |
| User I/O Count | — | 734 |
| Process Technology | — | 40 nm |
| Versorgungsspannung | — | [DATA_NEEDED: core voltage] |
| PCIe Hard IP | — | [DATA_NEEDED: PCIe Gen1/Gen2 lanes] |
| Configuration Scheme | — | [DATA_NEEDED: AS, PS, JTAG] |