EP2C35F672C7 vs EP2C50F672C7 Vergleich
Detaillierter Direktvergleich von EP2C35F672C7 von Intel und EP2C50F672C7 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP2C50F672C7 - Cyclone II FPGA, 50K LE, 672-FBGA | Intel / Altera
EP2C50F672C7 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP2C35F672C7 | EP2C50F672C7 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $119,95 | $184,59 |
| Series | Cyclone II | — |
| Logic Elements (LE) | 33,216 | 50,528 |
| Embedded Memory Bits | 483,840 bits (105 M4K blocks) | 594,432 bits |
| User I/O Count | 475 | — |
| Embedded 18x18 Multipliers | 35 | 86 (150 per device family datasheet figure) |
| PLLs | 4 | — |
| Gehäuse | 672-BGA (FineLine BGA) | 672-ball FineLine BGA (FBGA-672) |
| Speed Grade | 7 (commercial) | -7 |
| Process Technology | 90 nm low-k CMOS | 90 nm CMOS with low-k dielectric |
| Core Voltage | 1.2 V | — |
| Betriebstemperatur | 0C to +85C (commercial) | — |
| Configuration Interface | Serial (AS) and Parallel (PS) | — |
| Memory Interface Support | DDR, DDR2, QDRII SRAM | — |
| Montageart | Surface Mount | — |
| RoHS-Status | Compliant | — |
| Family | — | Cyclone II |
| Embedded Memory Blocks | — | 250 M4K blocks (4 Kbit each) |
| User I/O Pins | — | 450 |
| Phase-Locked Loops (PLL) | — | 4 |
| Global Clock Networks | — | 16 |
| Core Voltage (VCCINT) | — | 1.2 V |
| I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.0 V / 3.3 V (per bank) |
| Temperature Grade | — | Commercial (0C to +85C junction) |
| Configuration Modes | — | Passive Serial (PS), Active Serial (AS), JTAG |
| Lead-Free / RoHS | — | Lead-Free / RoHS compliant per Heisener listing |