EP2S130F1020I4 vs EP2S130F1020I4RB Vergleich
Detaillierter Direktvergleich von EP2S130F1020I4 von Intel und EP2S130F1020I4RB von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP2S130F1020I4RB - Stratix II FPGA 132540 Cells 1.2V FC-FBGA | Intel
EP2S130F1020I4RB ObsoleteSpezifikationsvergleich
| Parameter | EP2S130F1020I4 | EP2S130F1020I4RB |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.395,00 | $875,00 |
| Family | Stratix II | Stratix II |
| Logic Elements | 132,540 | 132,540 |
| Equivalent LEs | ~180,000 | — |
| Adaptive Logic Modules (ALMs) | 53,016 | — |
| Embedded Memory (bits) | 6,747,840 | — |
| Embedded Memory (M512 blocks) | 530 | — |
| Embedded Memory (M4K blocks) | 768 | — |
| Embedded Memory (M-RAM blocks) | 4 | — |
| Embedded 18x18 Multipliers | 504 | — |
| DSP Blocks | 48 | — |
| User I/O Pins | 742 | — |
| User I/O Banks | 12 | — |
| Gehäuse | 1020-ball FC-FBGA (33x33 mm) | 1020-pin FC-FBGA |
| Process Node | 90 nm CMOS, all-layer copper | — |
| Core Voltage (VCCINT) | 1.2 V | — |
| Speed Grade | I (industrial performance) | I4 |
| Device Revision | 4 | — |
| Betriebs-Sperrschichttemperatur | -40C to +100C (industrial) | — |
| Configuration Scheme | Fast Passive Parallel x8, Passive Serial, JTAG | — |
| Montageart | Surface Mount (FC-FBGA) | Surface Mount |
| RoHS-Status | Compliant (per distributor listings) | [DATA_NEEDED: rohs_status] |
| Number of User I/O | — | 742 |
| Number of Logic Gates | — | 6,747,840 (equivalent gates) |
| Operating Frequency (Max) | — | 711.24 MHz |
| Process Technology | — | 90 nm |
| Core Supply Voltage | — | 1.2 V |
| Betriebstemperatur | — | -40C to +100C (Industrial) |
| Number of Transceivers | — | 12 (up to 6.375 Gbps) |
| Embedded Memory | — | 6,747,840 bits (RAM blocks) |
| Number of PLLs | — | 4 (up to 16 clock pins) |
| Configuration Mode | — | JTAG / PS / PPS / EPCS / EPCQ |
| MSL-Level | — | 3 |