EP2S130F1020I4N vs EP2S130F1020I4RB Vergleich
Detaillierter Direktvergleich von EP2S130F1020I4N von Intel und EP2S130F1020I4RB von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP2S130F1020I4N - Stratix II 132K LEs FPGA, 742 I/O | Intel / Altera
EP2S130F1020I4N ✗ AbgekündigtIntel
EP2S130F1020I4RB - Stratix II FPGA 132540 Cells 1.2V FC-FBGA | Intel
EP2S130F1020I4RB ObsoleteSpezifikationsvergleich
| Parameter | EP2S130F1020I4N | EP2S130F1020I4RB |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Ende des Lebenszyklus | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.380,00 | $875,00 |
| Family | Stratix II | Stratix II |
| Logic Elements | 132,540 | 132,540 |
| Logic Array Blocks (LABs) | 6,627 | — |
| Total RAM Bits | 6,747,840 | — |
| User I/O Count | 742 | — |
| Core Voltage (VCCINT) | 1.15 V to 1.25 V | — |
| Betriebstemperatur | -40C to +100C (TJ, Industrial) | -40C to +100C (Industrial) |
| Gehäuse / Bauform | 1020-BBGA (FineLine BGA, FC-FBGA) | — |
| Supplier Device Package | 1020-FBGA | — |
| Montageart | Surface Mount | Surface Mount |
| Process Node | 90 nm | — |
| Internal Operating Frequency | up to 711.24 MHz | — |
| Speed Grade | I4 (Industrial, speed bin 4) | I4 |
| Configuration | SRAM-based, volatile configuration memory | — |
| Design Software | Quartus II (legacy) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: rohs_status] |
| Lead-Free | [DATA_NEEDED: lead-free / lead-bearing finish] | — |
| Number of User I/O | — | 742 |
| Number of Logic Gates | — | 6,747,840 (equivalent gates) |
| Operating Frequency (Max) | — | 711.24 MHz |
| Process Technology | — | 90 nm |
| Core Supply Voltage | — | 1.2 V |
| Gehäuse | — | 1020-pin FC-FBGA |
| Number of Transceivers | — | 12 (up to 6.375 Gbps) |
| Embedded Memory | — | 6,747,840 bits (RAM blocks) |
| Number of PLLs | — | 4 (up to 16 clock pins) |
| Configuration Mode | — | JTAG / PS / PPS / EPCS / EPCQ |
| MSL-Level | — | 3 |