EP2S15F672C3 vs EP2S15F672C5 Vergleich
Detaillierter Direktvergleich von EP2S15F672C3 von Intel und EP2S15F672C5 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP2S15F672C5 - Stratix II FPGA, 15.6K LEs, 672-BGA | Intel
EP2S15F672C5 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP2S15F672C3 | EP2S15F672C5 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $142,30 | $199,00 |
| Family | Stratix II | Stratix II |
| Logic Elements | 15,600 | 15,600 |
| Embedded Memory (bits) | 419,328 | — |
| DSP Blocks (18-bit multipliers) | 156 | — |
| Maximum User I/O | 366 | 366 |
| Core Voltage | 1.2 V | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Maximum Internal Frequency | [DATA_NEEDED: max internal clock MHz] | — |
| Gehäuse | 672-ball FC-FBGA | — |
| Montageart | Surface Mount | Surface Mount |
| Operating Temperature Grade | Commercial (C3 suffix) | — |
| Speed Grade | C3 (third commercial speed bin) | -5 (mid-tier) |
| PLLs | [DATA_NEEDED: number of PLLs] | — |
| Global Clock Networks | [DATA_NEEDED: number of global clocks] | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | Compliant (legacy lead-free version exists) |
| MSL-Level | [DATA_NEEDED: moisture sensitivity level] | — |
| Series | — | EP2S15 |
| CLBs | — | 6,240 |
| Memory Bits | — | 419,328 |
| Operating Frequency (max) | — | 640 MHz |
| Package Type | — | 672-ball FineLine BGA (FBGA) |
| Package Dimensions | — | 27 mm x 27 mm |
| Ball Pitch | — | 1 mm |
| Voltage - Supply (VCCINT) | — | [DATA_NEEDED: VCCINT nominal] |
| Betriebstemperatur | — | Commercial (0C to +85C) |
| Configuration Method | — | Passive Serial / Fast Passive Parallel / JTAG |