EP2S15F672C4 vs EP2S30F672C5 Vergleich
Detaillierter Direktvergleich von EP2S15F672C4 von Altera und EP2S30F672C5 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2S15F672C4 | EP2S30F672C5 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $235,00 | $155,00 |
| Family | Stratix II | Stratix II |
| Logic Elements | 15,600 | 33,880 |
| Embedded Memory Bits | 419,328 bits | — |
| DSP Blocks | 156 (approximate, per Stratix II family) | — |
| Maximum User I/Os | 366 | 500 |
| Gehäuse | 672-ball FineLine BGA (FBGA) | 672-pin FC-FBGA (flip-chip) |
| Process Node | 90 nm | — |
| PLLs | 6 | — |
| Betriebstemperatur | Commercial (0C to +85C, 'C' suffix) | — |
| Speed Grade | 4 | C5 (moderate-speed bin) |
| Configuration Method | Serial / Parallel (passive serial, fast passive parallel, JTAG) | — |
| I/O Standards Supported | LVTTL, LVCMOS, LVDS, SSTL, HSTL (per Stratix II family) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance per Altera product page] | [DATA_NEEDED: confirmed RoHS compliance] |
| Lead-Free | [DATA_NEEDED: lead-free finish status] | — |
| MSL-Level | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Logic Array Blocks (LABs) | — | 1,694 |
| Total RAM Bits | — | 1,369,728 |
| Embedded Multipliers (DSP blocks) | — | 12 DSP blocks |
| Core Voltage | — | 1.2 V |
| Maximum Operating Frequency | — | 609.76 MHz |
| Process Technology | — | 90 nm CMOS |
| Operating Temperature (Commercial) | — | 0C to 85C junction |
| Montageart | — | Surface Mount (BGA) |
| Speichertyp | — | TriMatrix (M512 / M4K / M-RAM) |