EP2S30F484C3N vs EP2S30F484C5 Vergleich
Detaillierter Direktvergleich von EP2S30F484C3N von Intel und EP2S30F484C5 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP2S30F484C5 - Stratix II FPGA 33,880 Logic Elements | Altera/Intel
EP2S30F484C5 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP2S30F484C3N | EP2S30F484C5 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $797,96 | $305,40 |
| FPGA Family | Stratix II | — |
| Number of Logic Elements/Cells | 33880 cells | — |
| Number of LABs | 1694 LABs | — |
| Total RAM Bits | 1369728 bits | 1,369,728 |
| Number of User I/Os | 342 | — |
| Core Supply Voltage | 1.2 V | — |
| Maximum Internal Frequency | 816.99 MHz | — |
| Technology Process | 90 nm CMOS | — |
| Gehäuse / Bauform | 484-BBGA, FC-FBGA | 484-BBGA, FC-FBGA |
| Number of Ball Terminals | 484 | — |
| Montageart | Surface Mount | Surface Mount |
| Terminal Form | Ball | — |
| Package Shape | Square | — |
| Embedded Memory Blocks | [DATA_NEEDED: exact M4K/M512/M-RAM block counts] | — |
| Embedded Multipliers | [DATA_NEEDED: number of 18x18 embedded multipliers] | — |
| Family | — | Stratix II |
| Logic Elements | — | 33,880 |
| Number of LABs/CLBs | — | 1,694 |
| Number of I/Os | — | 342 |
| Number of Gates | — | [DATA_NEEDED: gate count equivalence for EP2S30] |
| Voltage - Supply | — | 1.2 V core |
| Betriebstemperatur | — | 0C to +85C (commercial, C5 grade) |
| Package Dimensions | — | [DATA_NEEDED: 484-FBGA body size] |
| Process Technology | — | 90 nm CMOS |
| Speed Grade | — | C5 (commercial) |
| Supplier Device Package | — | 484-FBGA |
| RoHS-Status | — | [DATA_NEEDED: lead-free/RoHS confirmation for EP2S30F484C5] |
| MSL-Level | — | [DATA_NEEDED: MSL rating for FBGA484] |
| DSP Blocks | — | 16 embedded multiplier blocks (family-level) |
| Maximum Frequency | — | 609.76 MHz (family reference) |