EP2S30F672I4 vs EP2S30F672I4N Vergleich
Detaillierter Direktvergleich von EP2S30F672I4 von Intel und EP2S30F672I4N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2S30F672I4 | EP2S30F672I4N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $695,00 | $145,00 |
| Series | Stratix II | — |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 33880 | — |
| Logic Array Blocks (LABs) | 1694 | 1,694 |
| Total RAM Bits | 1369728 | 1,369,728 |
| Number of I/O | 500 | — |
| DSP Blocks | 12 (per datasheet, family range) | — |
| Number of PLLs | 6 | — |
| Voltage - Supply | 1.2 V core, separate I/O bank VCCIO | — |
| Betriebstemperatur | -40C to +100C (Industrial) | -40C to +100C (industrial) |
| Montageart | Surface Mount | Surface Mount |
| Gehäuse / Bauform | 672-BBGA, FCBGA (FBGA-672) | — |
| Package Dimensions | 35 x 35 mm | — |
| Ball Pitch | 1.0 mm | — |
| Process Technology | 90 nm CMOS | — |
| Configuration | JTAG, serial, parallel (Stratix II scheme) | — |
| MSL-Level | 3 (per JEDEC J-STD-020) | 3 (per JEDEC J-STD-020) |
| RoHS-Status | [DATA_NEEDED: confirm RoHS compliance on part label] | Compliant |
| Family | — | Stratix II |
| Logic Elements (LEs) | — | 33,880 |
| Maximum User I/Os | — | 500 |
| Gehäuse | — | 672-BBGA, FCBGA (27x27 mm) |
| Core Supply Voltage | — | 1.15 V to 1.25 V |
| Technology Node | — | 90 nm |
| Speed Grade | — | I4 (speed grade 4, industrial) |
| Versorgungsspannung | — | 1.15 V to 1.25 V |
| Maximum Frequency | — | 711.24 MHz |