EP2S60F1020C4N vs EP2S130F1020C4N Vergleich
Detaillierter Direktvergleich von EP2S60F1020C4N von Intel und EP2S130F1020C4N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP2S130F1020C4N - 132K LE Stratix II FPGA, 1020-BGA | Intel
EP2S130F1020C4N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP2S60F1020C4N | EP2S130F1020C4N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $67,00 | $2.850,00 |
| Series | Stratix II | — |
| Family | Stratix II (EP2S60) | Stratix II |
| Logic Elements | 60,440 | 132,540 |
| Adaptive Logic Modules (ALMs) | 30,220 (approx.) | — |
| Logic Array Blocks (LABs) | 3,022 | 6,627 |
| Embedded Memory (bits) | 2,544,192 | — |
| Embedded Memory Blocks | M512/M4K/M-RAM TriMatrix memory | — |
| DSP Blocks (18-bit x 18-bit) | Up to 48 (24 per DSP block column pair typical) | — |
| User I/Os | 718 | — |
| Maximum Core Frequency | 711.24 MHz (per Arrow listing) | — |
| Core Voltage | 1.2 V | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Gehäuse | 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) | 1020-ball FC-FBGA |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Operating Temperature Grade | Commercial (C4 suffix indicates commercial, speed grade 4) | — |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG | — |
| PLLs / Clock Networks | Yes - on-chip PLLs and global clock networks | — |
| RoHS-Status | EU RoHS compliant with exemption (per Arrow listing) | Compliant |
| Total Memory Bits | — | 6,747,840 |
| Maximum User I/O | — | 742 |
| Core Voltage (VCCINT) | — | 1.2 V |
| Speed Grade | — | C4 (commercial) |
| Betriebstemperatur | — | 0C to +85C (commercial, inferred from C grade) |
| Maximum Internal Frequency | — | 711.24 MHz |
| Configuration Method | — | JTAG / Passive Serial / Active Serial |
| MSL-Level | — | 3 (per JEDEC J-STD-020, typical for FC-BGA) |
| Design Tool | — | Quartus II (legacy, up to v13.0sp1) |