EP2S60F484C3N vs EP2S60F484C4 Vergleich
Detaillierter Direktvergleich von EP2S60F484C3N von Intel und EP2S60F484C4 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2S60F484C3N | EP2S60F484C4 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.245,75 | $974,13 |
| Family | Stratix II | Stratix II |
| Logic Elements | 60,440 | — |
| Adaptive LUTs (ALUTs) | 48,352 | — |
| Embedded Memory (TriMatrix) | 2,544 Kbits (M4K + M512 + M-RAM) | — |
| Embedded DSP Blocks | 12 (48 GMACs at 450 MHz) | — |
| Maximum User I/O Pins | 334 | — |
| Gehäuse | 484-BGA (F484), 1.0 mm pitch | 484-ball FBGA (FineLine BGA) |
| Process Technology | 90 nm CMOS, 1.2 V core | 90 nm CMOS |
| Speed Grade | -3 (fastest commercial) | C4 (commercial, moderate speed) |
| Operating Temperature (Commercial) | 0C to +85C (TJ) | — |
| Supply Voltage VCCINT | 1.2 V nominal | — |
| Configuration Modes | FPP, AS, PS, JTAG | — |
| MSL-Level | 3 (per JEDEC J-STD-020) | — |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status per official datasheet] |
| Lead-Free | Yes | [DATA_NEEDED: lead-free status] |
| Logic Elements (LEs) | — | 60,440 |
| Adaptive Logic Modules (ALMs) | — | 30,220 |
| Logic Array Blocks (LABs) | — | 3,022 |
| Embedded Memory (bits) | — | 2,544,192 |
| Maximum User I/O | — | 334 |
| User I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Core Voltage | — | 1.2 V |
| Maximum Internal Frequency | — | 711.24 MHz (per third-party datasheet listing) |
| Montageart | — | Surface Mount |
| Betriebstemperatur | — | 0C to +85C (commercial, C-grade) |
| Configuration Memory | — | SRAM-based, volatile (requires external config device) |