EP2S60F672C3 vs EP2S60F672C3N Vergleich
Detaillierter Direktvergleich von EP2S60F672C3 von Altera und EP2S60F672C3N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2S60F672C3 | EP2S60F672C3N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.033,14 | $1.175,00 |
| Family | Stratix II | Stratix II |
| Logic Elements | 60,440 | — |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | 24,176 |
| Total RAM Bits | 2,544,192 | — |
| Embedded Multiplier Blocks | [DATA_NEEDED: 9x9 multiplier count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| User I/Os | 492 | — |
| PLLs | 4 | 4 |
| Global Clocks | [DATA_NEEDED: global clock count] | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V | — |
| Speed Grade | C3 | C3 (slower speed grade) |
| Gehäuse | 672-BBGA, FC-FBGA, 35 x 35 mm, 1.0 mm pitch | 672-pin FC-FBGA |
| Montageart | Surface Mount | Surface Mount |
| Configuration Modes | PS, PPS, PPA, FPP, JTAG | — |
| Betriebstemperatur | 0C to +85C (commercial) | 0C to +85C (commercial grade) |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | unknown |
| Logic Elements (LE) | — | 60,440 |
| Logic Array Blocks (LABs) | — | 3,022 |
| Total Embedded Memory | — | 2,544,192 bits (2.5 Mbits) |
| User I/O Pins | — | 492 |
| User I/O Banks | — | 8 |
| Core Supply Voltage (VCCINT) | — | 1.2 V |
| I/O Supply Voltage (VCCIO) | — | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) |
| Pre-Driver Supply (VCCPD) | — | 3.3 V |
| Maximum Internal Clock Frequency | — | 816.99 MHz |
| Global Clock Networks | — | 16 |
| Lead-Free | — | unknown |