EP2S60F672C3 vs EP2S60F672C5 Vergleich
Detaillierter Direktvergleich von EP2S60F672C3 von Altera und EP2S60F672C5 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2S60F672C3 | EP2S60F672C5 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.033,14 | $410,85 |
| Family | Stratix II | Stratix II |
| Logic Elements | 60,440 | 60,440 |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | — |
| Total RAM Bits | 2,544,192 | 2,544,192 bits |
| Embedded Multiplier Blocks | [DATA_NEEDED: 9x9 multiplier count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | 12 (dedicated 18 × 18 multipliers) |
| User I/Os | 492 | — |
| PLLs | 4 | — |
| Global Clocks | [DATA_NEEDED: global clock count] | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V | 1.2 V |
| Speed Grade | C3 | — |
| Gehäuse | 672-BBGA, FC-FBGA, 35 x 35 mm, 1.0 mm pitch | 672-ball FC-FBGA (35 × 35 mm, 1 mm pitch) |
| Montageart | Surface Mount | Surface Mount |
| Configuration Modes | PS, PPS, PPA, FPP, JTAG | — |
| Betriebstemperatur | 0C to +85C (commercial) | — |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Non-RoHS (legacy product, pre-RoHS production runs) |
| Device Family | — | Stratix II FPGA |
| Configurable Logic Blocks (CLBs) | — | 24,176 |
| Maximum User I/Os | — | 492 |
| Operating Frequency | — | Up to 609.76 MHz |
| Operating Temperature Grade | — | Commercial (C5 suffix) |
| Betriebstemperaturbereich | — | 0°C to +85°C |
| Number of PLLs | — | 4 |
| I/O Standards | — | LVDS, LVTTL, SSTL, HSTL, PCI-X |
| Configuration Scheme | — | Fast Passive Parallel, JTAG, Active Serial |