EP2S60F672C4 vs EP2S60F672C3N Vergleich
Detaillierter Direktvergleich von EP2S60F672C4 von Altera und EP2S60F672C3N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2S60F672C4 | EP2S60F672C3N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.080,00 | $1.175,00 |
| Family | Stratix II | Stratix II |
| Logic Elements (LE) | 60440 | 60,440 |
| Embedded Memory Bits | 2544192 | — |
| Logic Array Blocks (LAB) | 3022 | — |
| User I/Os | 492 | — |
| Gehäuse | 672-BBGA, FCBGA | 672-pin FC-FBGA |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0C to +85C (commercial) | 0C to +85C (commercial grade) |
| Speed Grade | C4 | C3 (slower speed grade) |
| Process Technology | 90 nm | 90 nm CMOS |
| Core Voltage | 1.2 V (typical) | — |
| DSP Blocks | [DATA_NEEDED: DSP block count per Stratix II variant] | — |
| RoHS-Status | [DATA_NEEDED: not confirmed in provided data] | unknown |
| Lead-Free | [DATA_NEEDED: not confirmed in provided data] | unknown |
| MSL-Level | [DATA_NEEDED: not in provided data] | — |
| Logic Array Blocks (LABs) | — | 3,022 |
| Adaptive Logic Modules (ALMs) | — | 24,176 |
| Total Embedded Memory | — | 2,544,192 bits (2.5 Mbits) |
| User I/O Pins | — | 492 |
| User I/O Banks | — | 8 |
| Core Supply Voltage (VCCINT) | — | 1.2 V |
| I/O Supply Voltage (VCCIO) | — | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) |
| Pre-Driver Supply (VCCPD) | — | 3.3 V |
| Maximum Internal Clock Frequency | — | 816.99 MHz |
| PLLs | — | 4 |
| Global Clock Networks | — | 16 |