EP2S90F1020I3N vs EP2S90F1020I5N Vergleich
Detaillierter Direktvergleich von EP2S90F1020I3N von Altera und EP2S90F1020I5N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP2S90F1020I3N - 90K LE Stratix II FPGA 1.2V FC-FBGA-1020 | Altera
EP2S90F1020I3N ⚠ Letzte BestellmöglichkeitAltera
EP2S90F1020I5N - Stratix II FPGA 90,960 LE | Intel / Altera
EP2S90F1020I5N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP2S90F1020I3N | EP2S90F1020I5N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $1.180,00 |
| Family | Stratix II | — |
| Logic Elements (LEs) | 90,960 | — |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | [DATA_NEEDED: ALM count] |
| Embedded Memory Bits | 4,520,488 | — |
| Embedded DSP Blocks | 12 (9-bit x 9-bit multiplier support) | — |
| Process Technology | 90 nm | 90 nm CMOS |
| Core Supply Voltage (VCCINT) | 1.2 V | — |
| Maximum Internal Frequency | 816.99 MHz (per datasheet headline) | — |
| Speed Grade | I3 (industrial temperature range) | 5 |
| Gehäuse | 1020-ball FC-FBGA (Flip-Chip Fine-pitch BGA) | 1020-ball FineLine BGA (FBGA) |
| Pin/Ball Count | 1020 | — |
| Betriebs-Sperrschichttemperatur | -40C to +100C (industrial, per I3 suffix) | — |
| User I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Maximum User I/O | [DATA_NEEDED: maximum user I/O count] | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status] |
| Lead-Free | Yes | — |
| MSL-Level | [DATA_NEEDED: MSL rating] | — |
| Series | — | Stratix II |
| Logic Elements | — | 90,960 |
| Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Total RAM Bits | — | 4,520,448 (approx. 4.5 Mbits) |
| Embedded 18x18 Multipliers | — | [DATA_NEEDED: DSP block count] |
| Maximum User I/O Pins | — | [DATA_NEEDED: user I/O count] |
| Transceiver Channels | — | Up to 12 |
| Transceiver Data Rate (max) | — | 1 Gbps per channel |
| Number of PLLs | — | 8 |
| Core Voltage | — | 1.2 V |
| Betriebstemperatur | — | -40C to +100C (industrial) |