EP2S90F1020I4 vs EP2S60F1020I4 Vergleich
Detaillierter Direktvergleich von EP2S90F1020I4 von Intel und EP2S60F1020I4 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2S90F1020I4 | EP2S60F1020I4 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $2.200,00 | $1.454,92 |
| Family | Stratix II | — |
| Logic Elements (LE) | 90,960 | — |
| Equivalent LEs (with ALM) | up to 180,000 | — |
| Embedded Memory (bits) | 4,520,488 | 2,544,192 |
| Total RAM Blocks | 758 (M512/M4K/M-RAM) | — |
| DSP Blocks (18x18 multipliers) | 12 | — |
| Maximum User I/O | 758 | 718 |
| Transceivers | Up to 12 (6.375 Gbps) | — |
| Process Technology | 90 nm all-layer copper SRAM, 1.2 V core | 90 nm CMOS |
| Gehäuse | 1020-ball FBGA (33x33 mm) | — |
| Betriebstemperatur | -40C to +100C (industrial, I4 grade) | — |
| Supply Voltage (VCCINT) | 1.2 V | — |
| Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) | — |
| Montageart | Surface Mount (SMD/SMT) | Surface Mount |
| MSL-Level | 3 | — |
| Lead-Free / RoHS | Compliant | — |
| Manufacturer | — | Intel / Altera |
| Series | — | Stratix II |
| Logic Elements (LEs) | — | 60,440 |
| Number of LABs/CLBs | — | 3022 |
| Number of CLBs | — | 24176 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Operating Voltage (Core) | — | 1.2 V |
| Temperature Grade | — | Industrial (-40C to +100C TJ) |
| Package Type | — | 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) |
| Package Dimensions | — | 33 mm x 33 mm |
| Ball Pitch | — | 1.0 mm |
| Configuration Method | — | Passive Serial / Fast Passive Parallel / JTAG |
| Number of PLLs | — | 12 |
| Global Clock Networks | — | 16 |
| Embedded Multipliers (18x18) | — | 36 |
| Transceiver Count | — | 0 (no embedded transceivers) |
| Maximum Embedded Memory Bandwidth | — | [DATA_NEEDED: memory bandwidth spec] |
| RoHS-Status | — | Non-compliant (contains lead per legacy Altera package) |