EP2S90F780C5 vs EP2S130F780C5 Vergleich
Detaillierter Direktvergleich von EP2S90F780C5 von Altera und EP2S130F780C5 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP2S90F780C5 - Stratix II FPGA, 90,960 LEs, 780-FBGA | Altera
EP2S90F780C5 ⚠ Letzte Bestellmöglichkeit
Spezifikationsvergleich
| Parameter | EP2S90F780C5 | EP2S130F780C5 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.100,00 | $2.295,00 |
| Series | Stratix II | — |
| Family | Stratix II FPGA | Stratix II |
| Logic Elements | 90,960 | 132,540 |
| Logic Array Blocks / ALMs | 4,548 | — |
| Embedded RAM (Total RAM Bits) | 4,520,488 | — |
| Embedded Multiplier / DSP Blocks | [DATA_NEEDED: DSP block count and 18x18 multiplier count] | — |
| User I/O Pins | 534 | — |
| Core Voltage | 1.15 V to 1.25 V | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Internal Operating Frequency (max) | 609.76 MHz | — |
| Package Type | 780-ball FC-FBGA (FineLine BGA) | — |
| Package Dimensions | 29 x 29 mm | — |
| Ball Pitch | 1.0 mm | — |
| Betriebstemperatur | 0 C to 85 C (Commercial) | 0 C to +85 C (TJ) |
| Speed Grade | C5 | C5 |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG | — |
| PLLs | 4 enhanced + up to 8 fast PLLs | — |
| RoHS-Status | RoHS non-compliant (per alterachips listing) | — |
| Lead Free Status | [DATA_NEEDED: lead-free per JEDEC J-STD-609] | — |
| Logic Array Blocks (LABs) | — | 6627 |
| User I/O Count | — | 534 |
| Embedded Memory (bits) | — | 6,737,280 |
| Embedded 18x18 Multipliers | — | 252 |
| Core Voltage (VCCINT) | — | 1.15 V to 1.25 V (typ. 1.2 V) |
| Internal Clock Frequency (max) | — | 609.76 MHz |
| Gehäuse | — | 780-FBGA (FC-FBGA), 29 mm x 29 mm |
| Lead-Free / RoHS | — | Lead Free / RoHS Compliant |
| Configuration Interface | — | JTAG (IEEE 1149.1) + Passive Serial / Fast Passive Parallel |
| DSP Performance | — | Up to ~1.4 GMACs (per family datasheet) |