EP2S90F780C5N vs EP2S90F780C5 Vergleich

Detaillierter Direktvergleich von EP2S90F780C5N von Intel und EP2S90F780C5 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Altera
EP2S90F780C5 EP2S90F780C5 - Stratix II FPGA, 90,960 LEs, 780-FBGA | Altera

EP2S90F780C5 - Stratix II FPGA, 90,960 LEs, 780-FBGA | Altera

EP2S90F780C5 ⚠ Letzte Bestellmöglichkeit

Spezifikationsvergleich

Parameter EP2S90F780C5N EP2S90F780C5
Marke Intel Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Letzte Kaufgelegenheit
Lagerstatus In Stock In Stock
Stückpreis (USD) $198,00 $1.100,00
Family Stratix II Stratix II FPGA
Logic Elements 90,960 90,960
Adaptive Logic Modules (ALMs) 45,960 —
Embedded Memory Bits 4,520,488 —
Embedded Multipliers (18x18) 384 —
Maximum User I/O 534 —
User I/O Banks [DATA_NEEDED: user I/O bank count] —
Process Technology 90 nm CMOS 90 nm CMOS
Core Supply Voltage 1.2 V —
Internal Frequency (max) 609.76 MHz —
Betriebstemperaturbereich 0C to 85C (TJ, commercial) —
Speed Grade C5 C5
Gehäuse 780-ball FBGA, 29 x 29 mm, 1.0 mm pitch, lead-free —
Montageart Surface Mount —
Configuration Method JTAG, Passive Serial, Fast Passive Parallel, Active Serial —
Transceivers [DATA_NEEDED: number of high-speed transceivers] —
RoHS-Status Lead-free (per datasheets.com listing) RoHS non-compliant (per alterachips listing)
MSL-Level [DATA_NEEDED: MSL rating] —
Series — Stratix II
Logic Array Blocks / ALMs — 4,548
Embedded RAM (Total RAM Bits) — 4,520,488
Embedded Multiplier / DSP Blocks — [DATA_NEEDED: DSP block count and 18x18 multiplier count]
User I/O Pins — 534
Core Voltage — 1.15 V to 1.25 V
Internal Operating Frequency (max) — 609.76 MHz
Package Type — 780-ball FC-FBGA (FineLine BGA)
Package Dimensions — 29 x 29 mm
Ball Pitch — 1.0 mm
Betriebstemperatur — 0 C to 85 C (Commercial)
Configuration Modes — Passive Serial, Fast Passive Parallel, JTAG
PLLs — 4 enhanced + up to 8 fast PLLs
Lead Free Status — [DATA_NEEDED: lead-free per JEDEC J-STD-609]

Datenblätter & Ressourcen

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