EP2SGX30DF780C5 vs EP2SGX30DF780I4 Vergleich
Detaillierter Direktvergleich von EP2SGX30DF780C5 von Intel und EP2SGX30DF780I4 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP2SGX30DF780I4 - 33,880 Logic Cells Stratix II GX FPGA | Intel
EP2SGX30DF780I4 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP2SGX30DF780C5 | EP2SGX30DF780I4 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $384,62 | $178,25 |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements (LE) | 33,880 | — |
| LABs/CLBs | 1694 | — |
| Total RAM Bits | 1,369,728 bits | 1,369,728 |
| Number of Logic Cells | 33,880 cells | — |
| Maximum User I/Os | 361 | — |
| Transceiver Channels | 4 (up to 3.125 Gbps each) | — |
| Internal Frequency (max) | 609.76 MHz | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V | — |
| Betriebstemperatur | -40C to +85C (commercial) | -40C to +85C (Industrial) |
| Gehäuse | 780-ball FBGA (FC-FBGA), 29 x 29 mm, 1 mm pitch | 780-ball FC-FBGA, 29x29 mm, 1 mm pitch |
| Montageart | Surface Mount | Surface Mount (Flip-chip BGA) |
| Speed Grade | -5 | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status from verified data] | [DATA_NEEDED: RoHS status] |
| Series | — | Stratix II GX |
| Logic Elements / Cells | — | 33,880 |
| Number of LABs | — | 1,694 |
| User I/O Count | — | 361 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Nominal Supply Voltage (Core) | — | 1.2 V |
| Internal Operating Frequency | — | 622 MHz |
| Maximale Taktfrequenz | — | 717 MHz |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| MSL-Level | — | [DATA_NEEDED: MSL level] |
| Number of Transceivers | — | [DATA_NEEDED: number of transceiver channels] |
| Number of PLLs / DLLs | — | [DATA_NEEDED: number of PLLs] |