EP2SGX90EF1508C3N vs EP2SGX90F1508C5N Vergleich
Detaillierter Direktvergleich von EP2SGX90EF1508C3N von Altera und EP2SGX90F1508C5N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP2SGX90EF1508C3N - Stratix II GX FPGA 90K LEs 1.2V FC-FBGA1508 | Intel
EP2SGX90EF1508C3N ⚠ Letzte BestellmöglichkeitAltera
EP2SGX90F1508C5N - 90K LE Stratix II GX FPGA, 1508-FBGA | Intel / Altera
EP2SGX90F1508C5N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP2SGX90EF1508C3N | EP2SGX90F1508C5N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.450,00 | $195,50 |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements (LEs) | 90960 | — |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | — |
| Logic Array Blocks (LABs) | 4548 | — |
| Embedded Memory (bits) | 4520448 | — |
| DSP Blocks / 18x18 Multipliers | 192 | — |
| Maximum User I/Os | 650 | — |
| Transceiver Channels | 12 | — |
| Transceiver Data Rate | up to 6.375 Gbps | 600 Mbps to 6.375 Gbps |
| PLLs / DLLs | 8 PLLs / 16 DLLs | — |
| Maximum Internal Clock Frequency | 816.9 MHz | — |
| Process Technology | 90 nm CMOS | 90 nm |
| Core Supply Voltage | 1.2 V | — |
| Speed Grade | C3 (Enhanced, commercial) | C5 (commercial, mid-tier) |
| Gehäuse | 1508-ball FC-FBGA | 1508-ball FBGA (FCBGA), 40 x 40 mm, 1.0 mm pitch |
| Montageart | Surface Mount | — |
| Betriebstemperatur | 0C to +85C (commercial) | 0C to +85C (commercial, 'C' suffix) |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG | — |
| Bitstream Encryption | AES-128 supported | — |
| RoHS-Status | Compliant (lead-free) | Compliant |
| Series | — | Stratix II GX |
| Logic Elements (LE) | — | 90960 |
| Adaptive Logic Modules (ALM) | — | 4520 |
| Embedded Memory | — | 4520448 bits (approx.) |
| DSP Blocks | — | 12 |
| 18x18 Multipliers | — | 364 |
| Maximum User I/O | — | 650 |
| Multi-Gigabit Transceivers | — | Up to 20 channels |
| PLLs | — | 16 (with dynamic reconfiguration) |
| Global Clock Networks | — | 16 |
| Core Voltage (VCCINT) | — | 1.2 V |
| I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Lead-Free (Pb-Free) | — | Yes (N suffix) |
| Configuration Scheme | — | Fast Passive Parallel (FPP), Active Serial (AS), Passive Serial (PS), JTAG |