EP3C16U484C7 vs EP3C16F484C7N Vergleich

Detaillierter Direktvergleich von EP3C16U484C7 von Altera und EP3C16F484C7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP3C16U484C7 EP3C16F484C7N
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Aktiv Aktiv
Device Type Cyclone III Field Programmable Gate Array (FPGA) —
Logic Cells 15,408 cells —
I/O Count 346 I/O —
Maximum Frequency 437.5 MHz —
Process Technology 65 nm 65 nm TSMC low-power
Core Supply Voltage 1.2 V —
Gehäuse 484-pin FBGA/UFBGA 484-ball FBGA
Terminal Count 484 terminals —
Terminal Form Ball —
Package Code FBGA —
Package Shape Rectangular —
Betriebstemperatur -40 °C to +125 °C 0C to +85C (commercial)
Logic Blocks 346 —
Embedded Memory [DATA_NEEDED: embedded memory capacity] 504 Kbits (M9K blocks)
Configurable Logic Elements [DATA_NEEDED: configurable logic element count] —
I/O Voltage Range [DATA_NEEDED: I/O voltage range] —
Core Current [DATA_NEEDED: core current] —
Total Power [DATA_NEEDED: total power consumption] —
Configuration Interface [DATA_NEEDED: configuration interface] —
MSL [DATA_NEEDED: moisture sensitivity level] —
RoHS-Status [DATA_NEEDED: RoHS status] Compliant
Device Family — Cyclone III
Logic Elements — 15,408
Embedded Multipliers — 56 (18x18)
PLLs — 4
User I/O Pins — 346
Core Voltage — 1.2 V (1.15 V to 1.25 V)
Speed Grade — -7
Maximum Internal Frequency — 437.5 MHz
I/O Standards Supported — LVDS, LVCMOS, LVTTL, SSTL, HSTL
Configuration Method — JTAG (IEEE 1149.1), EPCS serial flash, Active Serial

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