EP3C40F484C6N vs EP3C40F484C8N Vergleich
Detaillierter Direktvergleich von EP3C40F484C6N von Altera und EP3C40F484C8N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP3C40F484C6N | EP3C40F484C8N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $312,40 | $21,40 |
| Family | Cyclone III | Cyclone III |
| Logic Elements (LE) | 39,600 | — |
| Total Memory Bits | 1,161,216 bits | — |
| Embedded 18x18 Multipliers | 396 | — |
| User I/O Pins (max) | 331 | — |
| PLLs | 4 | 4 |
| Process Technology | 65 nm low-k dielectric | TSMC 65 nm low-power CMOS |
| Core Voltage | 1.2 V | — |
| Gehäuse | 484-FBGA (F484, 23x23 mm, 1.0 mm pitch) | 484-FBGA (23×23 mm, 1.0 mm pitch) |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Speed Grade | C6 (commercial, -40C to +125C operating) | 8 (commercial) |
| Betriebstemperatur | -40C to +125C | -40C to +85C (industrial) |
| Configuration Modes | JTAG, AS, AP, PS | AS, AP, PS, JTAG |
| I/O Standards | LVDS, LVTTL, LVCMOS, SSTL, HSTL | — |
| RoHS-Status | Compliant (lead-free) | Lead-free / RoHS compliant |
| Logic Elements | — | 39,600 |
| Logic Array Blocks (LABs) | — | 2,475 |
| Embedded Memory | — | 1,161,216 bits (1134 Kbit M9K RAM) |
| Embedded 18×18 Multipliers | — | 126 |
| User I/Os | — | 331 |
| Global Clock Networks | — | 20 |
| Core Voltage (VCCINT) | — | 1.15 V to 1.25 V |
| LVDS Data Rate | — | Up to 875 Mbps per pair |