EP3C80U484C7 vs EP3C80U484C7N Vergleich
Detaillierter Direktvergleich von EP3C80U484C7 von Intel und EP3C80U484C7N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP3C80U484C7 | EP3C80U484C7N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $113,50 | $0,00 |
| Series | Cyclone III | — |
| Family | EP3C80 | — |
| Logic Elements | 81,264 | — |
| Embedded Memory | 2,810,880 bits (295 M9K blocks) | 2,810,880 bits |
| Embedded 18x18 Multipliers | 244 | — |
| PLLs | 4 | — |
| Maximum User I/O Pins | 429 (approximate, package-dependent) | — |
| Gehäuse | 484-FBGA (UBGA) | — |
| Speed Grade | -7 (commercial) | — |
| Core Voltage | 1.2 V | — |
| I/O Voltage Range | 1.2 V to 3.3 V | — |
| Process Technology | 65 nm low-power CMOS | 65 nm |
| Betriebs-Sperrschichttemperatur | 0 C to 85 C (commercial) | — |
| Configuration Modes | Passive Serial, Active Serial, JTAG, AES-encrypted bitstream | — |
| Memory Interface Support | DDR, DDR2, QDRII SDRAM | — |
| I/O Standards | LVDS, LVTTL, LVCMOS, SSTL, HSTL | — |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status] |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Product Family | — | Cyclone III |
| Logic Cell Count | — | 81,264 cells |
| User I/O Count | — | 295 I/O |
| Maximale Taktfrequenz | — | 437.5 MHz |
| Versorgungsspannung | — | 1.2 V |
| Terminal Count | — | 484 terminals |
| Package Code | — | FBGA |
| Package Description | — | 484-UBGA |
| Package Shape | — | Rectangular |
| Terminal Form | — | Ball |
| Temperature Grading | — | Other |
| Montagestil | — | Surface Mount |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |