EP3C80U484C7 vs EP3CLS100U484C7 Vergleich
Detaillierter Direktvergleich von EP3C80U484C7 von Intel und EP3CLS100U484C7 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP3C80U484C7 | EP3CLS100U484C7 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $113,50 | $520,00 |
| Series | Cyclone III | — |
| Family | EP3C80 | Cyclone III LS |
| Logic Elements | 81,264 | 100,448 |
| Embedded Memory | 2,810,880 bits (295 M9K blocks) | — |
| Embedded 18x18 Multipliers | 244 | [DATA_NEEDED: multiplier count] |
| PLLs | 4 | [DATA_NEEDED: PLL count] |
| Maximum User I/O Pins | 429 (approximate, package-dependent) | — |
| Gehäuse | 484-FBGA (UBGA) | 484-ball UFBGA (UBGA-484), 19 x 19 mm, 0.8 mm pitch |
| Speed Grade | -7 (commercial) | — |
| Core Voltage | 1.2 V | 1.2 V |
| I/O Voltage Range | 1.2 V to 3.3 V | — |
| Process Technology | 65 nm low-power CMOS | 65 nm CMOS |
| Betriebs-Sperrschichttemperatur | 0 C to 85 C (commercial) | — |
| Configuration Modes | Passive Serial, Active Serial, JTAG, AES-encrypted bitstream | — |
| Memory Interface Support | DDR, DDR2, QDRII SDRAM | — |
| I/O Standards | LVDS, LVTTL, LVCMOS, SSTL, HSTL | — |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status] |
| Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Total RAM Bits | — | 4,451,328 |
| User I/O Pins | — | 278 |
| Montageart | — | Surface Mount |
| Maximum Internal Frequency | — | 437.5 MHz to 450 MHz |
| Bitstream Encryption | — | 256-bit AES (Cyclone III LS feature) |
| Betriebstemperatur | — | Commercial (0C to +85C) |
| Configuration Interface | — | Active Serial, Passive Serial, Fast Passive Parallel, JTAG |
| Design Software | — | Quartus II (legacy) / Intel Quartus Prime |