EP3SE50F484C4G vs EP3SE50F484C2G Vergleich
Detaillierter Direktvergleich von EP3SE50F484C4G von Intel und EP3SE50F484C2G von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP3SE50F484C2G - Stratix III E FPGA 47.5K LE 484-FBGA | Intel
EP3SE50F484C2G ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP3SE50F484C4G | EP3SE50F484C2G |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $1.180,00 |
| Product Type | Stratix III E field-programmable gate array | — |
| Technology | Field-programmable gate array | — |
| Logic Elements | 47,500 LE | — |
| Adaptive Logic Modules | 19,000 ALM | — |
| Logic Array Blocks | 1,900 LAB | — |
| Embedded Memory | 5.49 Mbit | — |
| Number of I/O | 296 I/O | — |
| Betriebsversorgungsspannung | 1.1 V | — |
| Minimum Operating Temperature | 0 °C | — |
| Maximum Operating Temperature | +85 °C | — |
| Gehäuse | 484-BBGA, FCBGA | — |
| Ball Count | 484 balls | — |
| Montagestil | SMD/SMT | — |
| Manufacturer | Intel | — |
| Legacy Brand | Altera | — |
| RoHS-Status | unknown | Compliant |
| REACH Status | unknown | — |
| Series | — | Stratix III E |
| Number of Logic Elements / Cells | — | 47,500 |
| Number of LABs / CLBs | — | 1,900 |
| Total RAM Bits | — | 5,760,000 (5,760 Kbit) |
| Number of User I/O | — | 296 |
| Gehäuse / Bauform | — | 484-BBGA, FCBGA (FineLine BGA) |
| Montageart | — | Surface Mount |
| Core Voltage Supply | — | 0.86 V to 1.15 V |
| Betriebstemperatur | — | 0 °C to +85 °C (TJ) |
| Process Technology | — | 40 nm TSMC low-power CMOS |
| Logic Element Architecture | — | Adaptive Logic Module (ALM) with 8-input fracturable LUT |
| Embedded DSP Blocks | — | Yes (variable-precision multipliers) |
| Transceivers | — | Multi-gigabit transceivers (selected package pins) |
| Memory Interface Support | — | DDR / DDR2 / DDR3 with hard PHY |
| Partial Reconfiguration | — | Supported |
| Configuration Interface | — | JTAG, Passive Serial, Fast Passive Parallel |
| Part Status | — | Active (Intel catalogue); long-term supply subject to Stratix III lifecycle policy |