EP3SE50F780C4N vs EP3SE50F780C4 Vergleich
Detaillierter Direktvergleich von EP3SE50F780C4N von Intel und EP3SE50F780C4 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP3SE50F780C4N | EP3SE50F780C4 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.430,00 | $726,28 |
| Family | Stratix III E | Stratix III E |
| Logic Elements (LE) | 47,500 | 47,500 |
| Embedded Memory Bits | 5,760,000 | — |
| Embedded Memory (M9K/M144K blocks) | 488 (per family datasheet) | — |
| Number of LABs | 1900 | — |
| Maximum User I/Os | 488 | — |
| DSP Blocks (18x18 multipliers) | 432 | — |
| PLLs | 12 (per family datasheet) | — |
| Maximum Operating Frequency | 717 MHz | — |
| Transceiver Channels | Up to 12 (per family, model-dependent) | — |
| Transceiver Data Rate | Up to 6.375 Gbps (per Stratix III E family) | — |
| Process Node | 40 nm | — |
| Gehäuse | 780-Ball FBGA, 29 mm x 29 mm, 1.0 mm pitch | 780-Ball FC-FBGA (BBGA) |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Versorgungsspannung | Core 0.9 V, I/O 1.2 V-3.3 V (multi-rail) | — |
| Betriebstemperatur | 0C to +85C (C4 commercial grade) | 0C to +85C |
| Configuration Modes | JTAG, Passive Serial, Fast Passive Parallel | — |
| RoHS-Status | Lead-free / RoHS compliant | [DATA_NEEDED: rohs_status] |
| MSL-Level | 3 (per JEDEC J-STD-020, FBGA package) | [DATA_NEEDED: msl_level] |
| Hard Memory Controller | DDR2/DDR3 SDRAM (per Stratix III E family) | — |
| Embedded Memory (bits) | — | 5,760,000 |
| Maximum User I/O | — | 488 |
| Logic Array Blocks (LABs) | — | 1,900 |
| Maximum Internal Frequency | — | 800 MHz |
| Process Technology | — | 65 nm |
| Core Supply Voltage | — | 1.1 V |
| Speed Grade | — | C4 (commercial) |
| Transceivers | — | [DATA_NEEDED: transceiver_count_and_rate] |