EP3SE50F780I4 vs EP3SE110F780I3N Vergleich
Detaillierter Direktvergleich von EP3SE50F780I4 von Altera und EP3SE110F780I3N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP3SE50F780I4 - Stratix III E FPGA, 47.5K LE, 780-FBGA | Intel / Altera
EP3SE50F780I4 ⚠ Letzte BestellmöglichkeitIntel
EP3SE110F780I3N - 107.5K Logic Elements, 780-FBGA FPGA | Intel Stratix III E
EP3SE110F780I3N NrndSpezifikationsvergleich
| Parameter | EP3SE50F780I4 | EP3SE110F780I3N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.195,00 | $1.950,00 |
| Family | Stratix III E (Enhanced) | Stratix III E |
| Series | Stratix III | — |
| Logic Elements (LE) | 47,500 | — |
| Adaptive Logic Modules (ALMs) | 1,900 LABs | — |
| Total Memory | 5,760 Kbits | — |
| Embedded Memory Blocks | [DATA_NEEDED: block count and sizes] | — |
| Embedded Multipliers / DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Maximum User I/Os | 488 | 488 |
| User I/O Banks | [DATA_NEEDED: bank count] | — |
| Transceivers | [DATA_NEEDED: transceiver count and data rate] | — |
| Process Technology | 65 nm CMOS | 65 nm CMOS |
| Core Voltage | 1.1 V | 1.1 V (range 1.05 V to 1.15 V) |
| Operating Temperature Grade | I4 (Industrial) | — |
| Gehäuse | 780-ball FC-FBGA | 780-pin FC-FBGA (Flip-Chip FineLine BGA) |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS-Status | [DATA_NEEDED] | Compliant |
| Lead-Free | Yes (per Altera/Intel product page) | — |
| Logic Elements | — | 107,500 |
| Logic Array Blocks (LABs) | — | 4,300 |
| Embedded Memory Bits | — | 8,936,448 (approximately 1.1 MB) |
| Betriebstemperatur | — | -40 °C to +100 °C (Industrial, "I" grade) |
| Configuration Interface | — | Passive Serial (PS), Fast Passive Parallel (FPP), JTAG (IEEE 1149.1) |
| Boundary-Scan Test | — | Yes, per IEEE Std. 1149.1 |
| Speed Grade | — | 3 (Fast) |
| PLLs | — | Yes, with global and regional clock networks |
| MSL-Level | — | [DATA_NEEDED: MSL level] |
| Supply Voltage Tolerance | — | 1.05 V to 1.15 V |