EP3SL50F484I4LN vs EP3SL50F484I4G Vergleich
Detaillierter Direktvergleich von EP3SL50F484I4LN von Altera und EP3SL50F484I4G von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP3SL50F484I4LN | EP3SL50F484I4G |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $165,00 |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Device Family | Stratix III L | — |
| Logic Cells | 47,500 | — |
| Embedded Memory | 2,184,192 bits | — |
| User I/O | 296 | — |
| Logic Array Blocks | 1,900 LABs | — |
| Listed Frequency | 717 MHz | — |
| Process Technology | CMOS | 65 nm CMOS |
| Gehäuse | 484-BBGA, FCBGA | 484-BBGA, FC-BGA (FineLine BGA) 23 x 23 mm |
| Package Description | FBGA-484 | — |
| Terminal Count | 484 | — |
| Terminal Form | Ball | — |
| Package Body Material | Plastic/Epoxy | — |
| Lead-Free Status | Lead free | — |
| Operating Temperature Grade | Industrial | — |
| I/O Banks | [DATA_NEEDED: I/O bank count] | — |
| Transceiver Count | [DATA_NEEDED: transceiver count] | — |
| Core Voltage | [DATA_NEEDED: core voltage] | 1.1 V |
| I/O Voltage | [DATA_NEEDED: I/O voltage] | — |
| Junction Temperature | [DATA_NEEDED: junction temperature] | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Compliant |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Family | — | Stratix III L |
| Logic Elements | — | 47,500 |
| LABs/CLBs | — | 1,900 |
| Total Memory Bits | — | 2,184,192 bits |
| Number of I/O | — | 296 user I/O |
| Number of Logic Gates | — | [DATA_NEEDED: total gate count] |
| Maximum Internal Frequency | — | 450 MHz |
| Betriebstemperatur | — | -40C to +100C (Industrial) |
| Montageart | — | Surface Mount |
| Supply Voltage Range | — | [DATA_NEEDED: full supply tolerance band] |
| Configuration Method | — | SRAM-based, loaded via JTAG, Active Serial, or Active Parallel |