EP4CE10F17C8N vs EP4CE10F17I7 Vergleich
Detaillierter Direktvergleich von EP4CE10F17C8N von Altera und EP4CE10F17I7 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP4CE10F17C8N | EP4CE10F17I7 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Unknown |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $17,95 | $0,00 |
| Family | Cyclone IV E | — |
| Logic Elements (LEs) | 10320 | — |
| Embedded Memory | 423936 bits (414 Kbit) | [DATA_NEEDED: embedded memory capacity] |
| Embedded Multipliers (18x18) | 23 | — |
| PLLs | 4 | — |
| Maximum User I/Os | 179 | — |
| Core Voltage (VCCINT) | 1.15 V to 1.25 V | — |
| I/O Voltage (VCCIO) | 1.2 V to 3.3 V | — |
| Maximum Internal Frequency | 402 MHz | — |
| Process Technology | 60 nm low-power SRAM | — |
| Gehäuse | 256-FBGA (F17), 17x17 mm | — |
| Configuration Method | SRAM, requires external EPCS/EPCQ flash | — |
| Betriebstemperatur | 0C to +85C (Commercial) | -40C to +85C |
| Montageart | Surface Mount (BGA) | — |
| RoHS-Status | Compliant | — |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| FPGA Family | — | Cyclone IV E |
| Device Variant | — | EP4CE10 (F17) |
| Logic Cells / Logic Elements | — | 47 logic blocks; 10,320 logic elements |
| Package Type | — | FBGA-256 |
| Terminal Count | — | 256 terminals |
| Versorgungsspannung | — | 1.2 V |
| Montagestil | — | Surface mount |
| Package Pitch | — | 1.0 mm |
| Terminal Form | — | Ball |
| Manufacturer | — | Intel / Altera |
| Lebenszyklusstatus | — | Not verified |
| RoHS Compliance | — | Not verified in supplied data |
| REACH Compliance | — | Not verified in supplied data |
| Automotive Qualification | — | Not verified in supplied data |
| Configuration Interface | — | [DATA_NEEDED: configuration interface] |
| I/O Standard | — | [DATA_NEEDED: supported I/O standards] |
| Pin Assignment | — | [DATA_NEEDED: package pin assignment] |