EP610DC-25 vs EP610DC-10 Vergleich
Detaillierter Direktvergleich von EP610DC-25 von Rochester Electronics und EP610DC-10 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Rochester Electronics
EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester
EP610DC-25 ✓ AktivSpezifikationsvergleich
| Parameter | EP610DC-25 | EP610DC-10 |
|---|---|---|
| Marke | Rochester Electronics | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $7,95 |
| Family | Altera Classic EPLD | — |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 16 | 16 |
| Equivalent Gates | 300 | — |
| Maximum Propagation Delay (tPD) | 25 ns | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| Number of I/O Pins | 22 | — |
| Number of Dedicated Inputs | 4 | — |
| Total Pin Count | 24 | — |
| Gehäuse | 24-pin CDIP (Ceramic DIP, through-hole) | 24-pin CDIP (Ceramic DIP, windowed) |
| Montageart | Through Hole | Through-Hole |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| Betriebstemperatur | 0 C to +70 C | 0C to +70C (commercial) |
| Technology | CMOS EPROM (UV-erasable) | CMOS, EPROM-based (UV-erasable) |
| Programming Method | JEDEC fuse-map / UV-erase | — |
| Speed Grade Suffix | -25 (25 ns tPD) | — |
| Device Family | — | Altera Classic EPLD |
| Maximum Pipelined Data Rate | — | 100 MHz |
| Pin-to-Pin Propagation Delay (tpd) | — | 10 ns |
| Speed Grade | — | -10 |
| Versorgungsspannung | — | 5 V (single supply) |
| I/O Pins | — | [DATA_NEEDED: exact I/O count for CDIP-24 variant] |
| Logic Elements | — | 16 macrocells (programmable AND/OR array) |
| Configuration Memory | — | UV-erasable EPROM |
| Reprogrammable | — | Yes (UV erase window on package) |
| RoHS-Status | — | [DATA_NEEDED: not stated in verified web data] |