EP610DI-30 vs EP610DC-30 Vergleich
Detaillierter Direktvergleich von EP610DI-30 von Rochester Electronics und EP610DC-30 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Rochester Electronics
EP610DI-30 - 16-Macrocell Classic EPLD, 30ns, CERDIP-24 | Rochester Electronics
EP610DI-30 ✓ AktivSpezifikationsvergleich
| Parameter | EP610DI-30 | EP610DC-30 |
|---|---|---|
| Marke | Rochester Electronics | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $23,50 | $10,40 |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EP610 | EP610 (Classic Device Family) |
| Macrocells | 16 | 16 |
| Propagation Delay (tPD) | 30 ns | 30 ns |
| Pipelined Data Rate | 100 MHz | — |
| Technology | CMOS | CMOS EPROM |
| Versorgungsspannung | 5 V (single supply) | — |
| Gehäuse | CERDIP-24 (windowed, UV-erasable) | 24-pin CERDIP (windowed) |
| Montageart | Through-Hole | Through-Hole |
| Programmable Elements | EPROM (UV-erasable, windowed) | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | Commercial (0C to +70C) |
| I/O Pins | [DATA_NEEDED: I/O pin count] | 16 (with output enable) |
| Logic Capacity | [DATA_NEEDED: usable gates / logic capacity] | — |
| RoHS-Status | unknown | — |
| Lead-Free | unknown | — |
| Original Manufacturer | Altera (now Intel) | — |
| Current Supplier | Rochester Electronics (authorized continuing source) | — |
| MSL-Level | N/A (through-hole, non-surface-mount) | — |
| Product Type | — | Classic EPLD (Erasable Programmable Logic Device) |
| Logic Expanders | — | 4 (4 product terms per macrocell) |
| Usable Gates | — | 300 |
| Maximum Pipelined Clock Frequency | — | 100 MHz |
| Dedicated Inputs | — | 16 |
| Speed Grade | — | -30 (30 ns tPD) |
| Programmability | — | UV-erasable, windowed EPROM |
| Security Bit | — | Yes (protects design after programming) |
| Output Modes | — | Registered and Combinatorial |