EP610ILC-25 vs EP610ILI-12 Vergleich
Detaillierter Direktvergleich von EP610ILC-25 von Altera und EP610ILI-12 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP610ILC-25 | EP610ILI-12 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,85 | $9,75 |
| Family | Classic EPLD (EP610 series) | Classic EPLD (EP610) |
| Device Type | EEPLD (Electrically Erasable PLD) | — |
| Usable Gates | 300 | 300 |
| Macrocells | 16 | — |
| Product Terms | 160 | — |
| Maximum Operating Frequency (fMAX) | 40 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 25 ns | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Nominal Supply Voltage | 5 V | — |
| Total Inputs | 20 | — |
| Dedicated Inputs | 4 | 4 |
| Bidirectional I/O Pins | 16 | — |
| Betriebstemperaturbereich | 0 C to +70 C (commercial) | — |
| Gehäuse | 28-pin PLCC (J-lead) | 28-pin PLCC (J-Lead) |
| Montageart | Surface Mount | Surface Mount |
| Process Technology | CMOS, electrically erasable | — |
| Programming Method | In-system, electrically erasable | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Macro Cells | — | 16 |
| Speed Grade (tpd) | — | 12 ns |
| Supply Voltage (Vcc) | — | 5 V (4.75 V to 5.25 V) |
| Supply Voltage (Vpp) | — | [DATA_NEEDED: Vpp programming voltage] |
| Operating Frequency (max) | — | 83.3 MHz |
| Logic Elements | — | [DATA_NEEDED: exact LE count] |
| User I/O Pins | — | [DATA_NEEDED: I/O pin count] |
| Technology | — | CMOS EPROM |
| Betriebstemperatur | — | -40C to +85C (industrial grade) |
| Programmable Security Bit | — | Yes |
| TTL Compatibility | — | 100 TTL emulation |
| MSL-Level | — | [DATA_NEEDED: MSL rating] |