EP610LC-25 vs EP610LC-35 Vergleich
Detaillierter Direktvergleich von EP610LC-25 von Intel und EP610LC-35 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP610LC-25 | EP610LC-35 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $6,20 | $9,95 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EPLD | Altera Classic EPLD |
| Macrocells | 16 | 16 |
| Logic Array Blocks (LABs) | 4 | — |
| Propagation Delay (tPD) | 25 ns | — |
| Maximum Toggle Frequency | 100 MHz | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| Versorgungsspannung | 5 V ±5% | — |
| Technology | CMOS | CMOS EEPROM (one-time-programmable plastic) |
| Programmability | UV-erasable (windowed package) | — |
| Gehäuse | PLCC-28 | 28-pin PLCC (J-lead) |
| Betriebstemperatur | 0C to +70C (commercial) | Commercial (0C to +70C) [DATA_NEEDED: exact grade letter] |
| Montageart | Surface Mount | Surface Mount |
| I/O Pins | [DATA_NEEDED: exact I/O count] | — |
| RoHS-Status | [DATA_NEEDED] | [DATA_NEEDED: rohs_status] |
| Device Series | — | EP610 |
| Usable Gates | — | 300 |
| Propagation Delay (tpd) | — | 37 ns |
| Supply Voltage (Vcc) | — | 5 V |
| Speed Grade | — | -35 (slowest EP610) |
| Programmable Pins | — | 24 input / 16 output (shared macrocells) |
| Lead-Free | — | [DATA_NEEDED: lead_free] |
| MSL-Level | — | [DATA_NEEDED: msl_level] |
| Programming Tool | — | MAX+PLUS II development system |