EP610LI-35 vs EP910LC-35 Vergleich
Detaillierter Direktvergleich von EP610LI-35 von Altera und EP910LC-35 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP610LI-35 | EP910LC-35 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $10,50 | $18,75 |
| Family | Classic EPLD | Classic (EP910) |
| Series | EP610 | — |
| Number of Macrocells | 16 | — |
| Usable Gates | 300 | 450 |
| Number of I/O Pins | 16 | — |
| Total Inputs | 20 | — |
| Dedicated Inputs | 4 | — |
| External Clock Inputs | 2 | — |
| Product Terms | 160 | — |
| Maximum Propagation Delay | 35 ns (tpd) | — |
| Maximum Operating Frequency | 28.6 MHz (fmax) | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| Versorgungsspannung | 5 V | — |
| Process Technology | CMOS | — |
| Architecture | PAL-type (AND-OR array) | — |
| Gehäuse | 28-pin PLCC (windowed ceramic, 'LI') | PLCC-44 (J-lead, LC suffix) |
| Betriebstemperaturbereich | [DATA_NEEDED: military/industrial operating temperature range] | — |
| Programming Technology | UV-erasable (EPROM) | — |
| Montageart | Surface Mount | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | Not applicable (legacy product) |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocells | — | 24 |
| Propagation Delay (tPD) | — | 35 ns |
| Maximum Toggle Frequency | — | 28.6 MHz |
| Supply Voltage (VCC) | — | 5 V |
| Technology | — | CMOS EPROM |
| Betriebstemperatur | — | 0C to +70C (commercial) |
| Pin-Anzahl | — | 44 |
| Programmable Flip-Flops | — | Yes (per macrocell) |
| Output Enable Control | — | Per macrocell |
| Erasure Method | — | UV (windowed) or OTP (plastic) |