EP910IPC-15 vs EP910LI-15 Vergleich
Detaillierter Direktvergleich von EP910IPC-15 von Altera und EP910LI-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910IPC-15 | EP910LI-15 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,95 | $10,70 |
| Device Family | Altera Classic EPLD (EP910 series) | Altera Classic EPLD |
| Product Type | Erasable Programmable Logic Device (EPLD) | Programmable Logic Device (PLD) |
| Architecture | PAL-type, CMOS | — |
| Macrocells | 24 | — |
| Dedicated Inputs | 12 | 12 |
| I/O Pins | 24 | — |
| Product Terms | 240 | — |
| External Clocks | 2 | — |
| Propagation Delay (tPD) | 15 ns | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Betriebstemperatur | 0C to +70C (commercial, IPC suffix) | — |
| Gehäuse | PDIP-40 (Plastic DIP, 40-pin) | 44-terminal J-lead ceramic chip carrier (PQCC44) |
| Montageart | Through-Hole | — |
| Process Technology | CMOS | — |
| Programming Method | JEDEC fuse map via Altera EPLD programmer | — |
| Pin-Anzahl | 40 | — |
| RoHS-Status | [DATA_NEEDED: rohs status not confirmed in verified data] | unknown |
| Part Number | — | EP910LI-15 |
| Supply Voltage Range | — | 4.5 V to 5.5 V |
| Input/Output Lines | — | 24 |
| Total User-Signal Resources | — | 36 |
| Speed Grade | — | 15 ns |
| Betriebstemperaturbereich | — | -40 °C to +85 °C |
| Technology | — | CMOS |
| Package Pin Count | — | 44 terminals |
| Package Mounting | — | Surface Mount |
| Dielectric/Construction | — | Ceramic |
| REACH Status | — | unknown |
| AEC-Q100 Status | — | not_applicable |
| Lead-Free Status | — | unknown |
| Halogen-Free Status | — | unknown |
| Conflict Minerals Status | — | unknown |