EP910LC-30 vs EP910LC-35 Vergleich
Detaillierter Direktvergleich von EP910LC-30 von Altera und EP910LC-35 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910LC-30 | EP910LC-35 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $22,50 | $18,75 |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocell Count | 24 | — |
| Propagation Delay (tPD) | 30 ns (max) | 35 ns |
| Maximum Toggle Frequency | 62 MHz | 28.6 MHz |
| Supply Voltage (VCC) | 5 V (nominal, TTL) | 5 V |
| Process Technology | CMOS (EPROM-based) | — |
| Package Type | PDIP-40 (Plastic DIP, through-hole) | — |
| Operating Temperature Grade | Commercial (0C to +70C) | — |
| I/O Pin Count | 24 | — |
| Dedicated Input Pins | 36 (including I/O) | — |
| Product Terms per Macrocell | Up to 16 | — |
| Programming Technology | UV-erasable EPROM cell | — |
| Development Tool | Altera MAX+PLUS II | — |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Not applicable (legacy product) |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Family | — | Classic (EP910) |
| Macrocells | — | 24 |
| Usable Gates | — | 450 |
| Technology | — | CMOS EPROM |
| Gehäuse | — | PLCC-44 (J-lead, LC suffix) |
| Betriebstemperatur | — | 0C to +70C (commercial) |
| Pin-Anzahl | — | 44 |
| Programmable Flip-Flops | — | Yes (per macrocell) |
| Output Enable Control | — | Per macrocell |
| Erasure Method | — | UV (windowed) or OTP (plastic) |