EP910LI-12 vs EP910LI-15 Vergleich
Detaillierter Direktvergleich von EP910LI-12 von Altera und EP910LI-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910LI-12 | EP910LI-15 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $15,95 | $10,70 |
| Device Family | Altera Classic EPLD | Altera Classic EPLD |
| Macrocells | 24 | — |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 12 ns | — |
| Maximum Frequency (fMAX) | 76.9 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V typical) | — |
| I/O Pins | 24 | — |
| Inputs (with input registers) | 36 | — |
| Gehäuse | 28-PLCC (windowed ceramic, J-Lead) | 44-terminal J-lead ceramic chip carrier (PQCC44) |
| Betriebstemperatur | -40C to +85C (industrial) | — |
| Process Technology | 1.0-micron CMOS EPROM | — |
| Power Dissipation (typical) | 200 mW at 5 V | — |
| Programming Method | UV-erasable via windowed package | — |
| Logic Compatibility | TTL-compatible I/O | — |
| RoHS-Status | non_compliant (ceramic windowed package) | unknown |
| Product Type | — | Programmable Logic Device (PLD) |
| Part Number | — | EP910LI-15 |
| Supply Voltage Range | — | 4.5 V to 5.5 V |
| Dedicated Inputs | — | 12 |
| Input/Output Lines | — | 24 |
| Total User-Signal Resources | — | 36 |
| Speed Grade | — | 15 ns |
| Betriebstemperaturbereich | — | -40 °C to +85 °C |
| Technology | — | CMOS |
| Package Pin Count | — | 44 terminals |
| Package Mounting | — | Surface Mount |
| Dielectric/Construction | — | Ceramic |
| REACH Status | — | unknown |
| AEC-Q100 Status | — | not_applicable |
| Lead-Free Status | — | unknown |
| Halogen-Free Status | — | unknown |
| Conflict Minerals Status | — | unknown |