EP910LI-35 vs EP910LI-35H Vergleich
Detaillierter Direktvergleich von EP910LI-35 von Altera und EP910LI-35H von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910LI-35 | EP910LI-35H |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $25,80 | $9,85 |
| Family | Altera Classic EPLD | Altera Classic EPLD (EP910) |
| Device Series | EP910 | — |
| Usable Gates | 900 | — |
| Macrocells | 24 | — |
| Maximum User I/O Pins | 38 | — |
| Propagation Delay (t_PD) | 35 ns | — |
| Maximum Counter Frequency (f_CNT) | 76.9 MHz | — |
| Versorgungsspannung | 5 V (4.75 V to 5.25 V) | — |
| Betriebstemperatur | -40 °C to +85 °C (Industrial) | -40C to +85C (industrial) |
| Gehäuse | 44-pin PLCC (J-lead) | 44-pin PLCC (J-lead) |
| Process Technology | CMOS EPROM | — |
| Programming Technology | EPROM (UV-erasable) | — |
| Erase/Program Cycles | ≥100 | — |
| Montageart | Surface Mount | Surface Mount |
| Lead Pitch | 1.27 mm | — |
| Logic Capacity | — | 900 usable gates |
| Macro Cells | — | 24 |
| Speed Grade (tPD) | — | 35 ns |
| Maximum Frequency | — | [DATA_NEEDED: fMAX] |
| Supply Voltage (VCC) | — | 5 V (±10%) |
| Technology | — | CMOS, UV-erasable EPROM cell |
| Standby Current | — | [DATA_NEEDED: ICCSB] |
| Active Supply Current | — | [DATA_NEEDED: ICC] |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| RoHS-Status | — | unknown |
| Lead-Free Option (H suffix) | — | Yes (H suffix) |