EP910LI-35H vs EP910ILC-25 Vergleich
Detaillierter Direktvergleich von EP910LI-35H von Intel und EP910ILC-25 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910LI-35H | EP910ILC-25 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,85 | $9,95 |
| Family | Altera Classic EPLD (EP910) | EP910 Classic EPLD |
| Logic Capacity | 900 usable gates | — |
| Macro Cells | 24 | — |
| Speed Grade (tPD) | 35 ns | — |
| Maximum Frequency | [DATA_NEEDED: fMAX] | — |
| Supply Voltage (VCC) | 5 V (±10%) | — |
| Technology | CMOS, UV-erasable EPROM cell | CMOS EPROM (UV-erasable) |
| Gehäuse | 44-pin PLCC (J-lead) | 44-pin JLCC (windowed ceramic) |
| Betriebstemperatur | -40C to +85C (industrial) | -40C to +85C (industrial) |
| Standby Current | [DATA_NEEDED: ICCSB] | — |
| Active Supply Current | [DATA_NEEDED: ICC] | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | unknown | non_compliant (ceramic windowed package) |
| Lead-Free Option (H suffix) | Yes (H suffix) | — |
| Macrocells | — | 24 |
| User I/O Pins | — | 36 |
| Propagation Delay (tPD) | — | 25 ns |
| Internal Frequency (fMAX) | — | [DATA_NEEDED: fMAX rating] |
| Logic Blocks | — | Sum-of-products AND/OR array |
| Configuration Memory | — | Non-volatile EPROM (windowed ceramic) |
| Versorgungsspannung | — | 5 V |
| Development Tool | — | Altera MAX+PLUS II (legacy) |
| Lebenszyklusstatus | — | Obsolete - last time buy was late 1990s |