EP910PC-30T vs EP910PC-30 Vergleich
Detaillierter Direktvergleich von EP910PC-30T von Intel und EP910PC-30 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910PC-30T | EP910PC-30 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $6,50 |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device | EP910 | — |
| Usable Gates | 900 | ~450 |
| Macrocells | 24 | 24 |
| Product Terms | 240 | — |
| Dedicated Inputs | 12 | — |
| I/O Pins | 24 | 12 bidirectional |
| Propagation Delay (tPD) | 30 ns | — |
| Maximum Clock Frequency (fCNT) | 33.3 MHz | — |
| Process Technology | CMOS | — |
| Versorgungsspannung | 5 V (TTL compatible) | — |
| Gehäuse | PDIP-40 (Plastic DIP) | PDIP-40 (plastic DIP, 0.6 inch) |
| Montageart | Through-Hole | Through-hole DIP |
| Betriebstemperatur | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Logic Compatibility | 100% TTL emulation | — |
| Programming | MAX+PLUS II / UV-erasable | — |
| Pin-to-Pin Propagation Delay (tPD) | — | 30 ns |
| Maximum Counter Frequency (fCNT) | — | 33.3 MHz |
| Supply Voltage (VCC) | — | 5 V ±10% |
| Logic Inputs | — | 36 dedicated |
| Logic Array Blocks (LABs) | — | 4 |
| Programming Technology | — | UV-erasable EPROM cell |
| TTL Emulation | — | 100% TTL-compatible |
| Power Dissipation | — | [DATA_NEEDED: power dissipation mW] |
| RoHS-Status | — | Non-compliant (contains lead, PDIP package) |