EPC1064VLC20 vs EPC160C100 Vergleich
Detaillierter Direktvergleich von EPC1064VLC20 von Altera und EPC160C100 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC1064VLC20 | EPC160C100 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1,51 | $7,20 |
| Speichertyp | OTP (One-Time Programmable) Configuration PROM | — |
| Speichergröße | 65,536 bit (64 Kb) | — |
| Speicherorganisation | 64K x 1 (serial) | — |
| Schnittstelle | Serial, daisy-chain capable | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5.0 V nominal) | — |
| Programmable Type | OTP (factory programmed; not in-system programmable) | — |
| Gehäuse | 20-pin PLCC (J-lead, 9 x 9 mm) | PQFP-100 |
| Betriebstemperatur | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| Compatible FPGA Families | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Cascade Support | Yes, daisy-chain output for up to 8 devices | Yes (nCASC pin for multi-FPGA daisy chain) |
| Montageart | Surface Mount (PLCC socket compatible) | Surface Mount |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| MSL-Level | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| Programming Method | Altera programming hardware (factory, pre-solder) | — |
| Device Type | — | Enhanced Configuration Device (EPC) for SRAM-based LUT FPGAs |
| Supported FPGA Families | — | Altera APEX, Cyclone, Stratix, and other SRAM-based LUT devices |
| Configuration Density | — | 160 Mbit equivalent tier |
| Operating Voltage (Core) | — | 3.3 V |
| Programming Interface | — | JTAG (IEEE 1149.1) in-system programmable |
| Configuration Interface | — | Serial / Parallel, Altera nCONFIG/nSTATUS/CONF_DONE protocol |
| Pin-Anzahl | — | 100 |
| Memory Technology | — | Flash-based non-volatile configuration memory |