EPC144ILC20 vs EPC144LC20 Vergleich
Detaillierter Direktvergleich von EPC144ILC20 von Intel und EPC144LC20 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPC144LC20 - 144KB Serial Config PROM, 20-LCC | Intel (Altera)
EPC144LC20 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPC144ILC20 | EPC144LC20 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | Memory ICs | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $7,10 |
| Manufacturer | Altera (now Intel) | — |
| Part Family | EPC144 - Configuration EPROM | — |
| Speichertyp | OTP CMOS Configuration EPROM (UV-erasable, factory OTP-programmed) | — |
| Speichergröße | 440,800 bit (54 KB) | — |
| Schnittstelle | Serial (Altera FLEX/MAX configuration - DCLK / DATA0 / nCONFIG / nSTATUS) | — |
| Supply Voltage VCC | 5 V (nominal) | — |
| Gehäuse | PLCC-20 (Plastic Leaded Chip Carrier, JEDEC MS-018) | 20-pin LCC (Leadless Chip Carrier, JLCC-20) |
| Betriebstemperaturbereich | [DATA_NEEDED: operating temperature range] | — |
| Configuration Mode | Master Serial / daisy-chain JTAG-style | — |
| Programmability | One-Time-Programmable (factory programmed by Altera with user bitstream) | — |
| JTAG Support | Yes (TDI/TDO pins for ByteBlasterMV / USB-Blaster ISP) | — |
| Compatible FPGAs | Altera EPF8282, EPF8452, EPF10K-series Classic FPGAs | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status per Intel PCN] |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | — |
| Montageart | Surface Mount (PLCC-20 socket or SMT land pattern) | Surface Mount |
| MSL-Level | [DATA_NEEDED: MSL rating] | 3 (168 hours) |
| Memory Capacity | — | 144 Kbit |
| Memory Organization | — | Serial (one-time programmable) |
| Schnittstellentyp | — | Altera Serial Configuration (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| Programming Method | — | In-system via JTAG (IEEE 1149.1 / ByteBlaster / USB-Blaster) |
| Supply Voltage (VCC) | — | 3.0 V to 5.5 V |
| Betriebstemperatur | — | -40C to +85C (industrial) |
| Configuration Time (typical) | — | [DATA_NEEDED: configuration time at DCLK = 10 MHz] |
| Active Supply Current | — | [DATA_NEEDED: ICC active] |
| Standby Supply Current | — | [DATA_NEEDED: ICC standby] |
| Pin-Anzahl | — | 20 |
| Supported FPGA Families | — | Altera FLEX 6000 / 8000 / 10K, ACEX 1K, MAX 3000 / 7000, APEX 20K |
| Lead-Free | — | Yes |
| Halogenfrei | — | [DATA_NEEDED] |
| JTAG Compliance | — | IEEE Std 1149.1 |