EPC144IPC8 vs EPC144PI8 Vergleich
Detaillierter Direktvergleich von EPC144IPC8 von Intel und EPC144PI8 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC144IPC8 | EPC144PI8 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | Memory ICs | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $4,10 | $7,25 |
| Speichertyp | Serial Configuration EEPROM | OTP Serial Configuration EPROM (UV-erasable package option available) |
| Speichergröße | 440,800 bit (440 Kbit) | — |
| Speicherorganisation | Configuration PROM (Altera proprietary serial interface) | — |
| Schnittstelle | Altera EPC1/EPC1441 dedicated serial protocol | 4-wire serial (DCLK, DATA, nCS, nINIT_STATUS) |
| Versorgungsspannung | 3.3 V / 5 V | — |
| Programmable Devices Supported | Altera MAX 7000, MAX 9000, FLEX 10K, APEX families | — |
| Internal Oscillator | Yes (no external clock required) | — |
| Gehäuse | PDIP-8 (8-pin plastic DIP) | PDIP-8 (300 mil) |
| Montageart | Through-Hole | Through-hole (THT) |
| Betriebstemperatur | 0C to +70C (commercial) [DATA_NEEDED: industrial grade option] | -40C to +85C (industrial, 'I' suffix) |
| Configuration Pins | DATA, DCLK, nCS, nINIT_CONF, OE, RESET | — |
| Standby Current | [DATA_NEEDED: standby current] | — |
| Active Programming Current | [DATA_NEEDED: active current] | — |
| MSL-Level | [DATA_NEEDED: MSL level] | Not applicable (through-hole) |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Memory Density | — | 144 Kbit (144,096 bits) |
| Configuration Clock (max) | — | [DATA_NEEDED: DCLK maximum frequency] |
| Supply Voltage VCC | — | [DATA_NEEDED: VCC operating range] |
| Pin-Anzahl | — | 8 |
| Process Technology | — | CMOS EPROM (1.8 V core option per suffix '8') |
| Programmability | — | One-Time Programmable (OTP) per bitstream; UV-erasable window package variant also exists |
| Target FPGA Compatibility | — | Altera FLEX 6000, FLEX 8000, FLEX 10K, APEX 20K (legacy) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| nINIT_STATUS Output | — | Open-drain, active-low (per datasheet family convention) |
| Power-On Reset | — | Internal automatic (per datasheet family convention) |