EPC16QC100SS vs EPC16QC100N Vergleich
Detaillierter Direktvergleich von EPC16QC100SS von Intel und EPC16QC100N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPC16QC100SS - 16Mb Config PROM for FPGAs, PQFP-100 | Intel
EPC16QC100SS ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPC16QC100SS | EPC16QC100N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $13,20 | $24,10 |
| Speichertyp | In-System Programmable Configuration PROM | — |
| Speichergröße | 16 Mb (16,777,216 bits) | 16 Mbit (16,777,216 bits) |
| Configuration Interface | Passive Serial / Passive Parallel Synchronous / Passive Parallel Asynchronous | FPP / PS / AS via dedicated FPGA pins |
| Operating Modes | FPGA configuration storage, ISP via IEEE 1532 | — |
| Supply Voltage (VCC) | 3.3 V (SS suffix variant) | 3.0 V to 3.6 V |
| I/O Logic Level | 3.3V or 2.5V selectable via VCCSEL | — |
| Betriebstemperatur | 0C to +70C (Commercial) | 0 C to 70 C |
| Gehäuse | 100-pin PQFP (Plastic Quad Flat Pack), 20x14 mm | 100-pin PQFP (20 x 14 mm) |
| Montageart | Surface Mount | Surface Mount |
| Compatible FPGAs | Stratix, Stratix II, Cyclone, Cyclone II, APEX 20K, other Altera FPGAs requiring >8 Mbit configuration | — |
| Programmability | In-system programmable (IEEE 1532) | — |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Manufacturer | Intel (formerly Altera) | — |
| Programmable Type | — | In System Programmable |
| Configuration Clock Frequency | — | 33 MHz max |
| On-Chip Decompression | — | Yes (supports compressed bitstreams) |
| Access Time | — | 90 ns typical |
| Flash Read Bandwidth | — | 160 Mbps (16-bit DQ at 10 MHz) |
| JTAG (IEEE 1149.1) ISP | — | Supported |
| Lead Free | — | Yes (per datasheet) |
| Packaging | — | Tray |
| Supported FPGA Families | — | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |