EPC16QC100T vs EPC16QC100N Vergleich

Detaillierter Direktvergleich von EPC16QC100T von Altera und EPC16QC100N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPC16QC100T EPC16QC100N
Marke Altera Altera
Kategorie Memory ICs Memory ICs
Lebenszyklusstatus NRND Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $17,95 $24,10
Speichertyp In-System Programmable Configuration PROM —
Speichergröße 16 Mbit 16 Mbit (16,777,216 bits)
Schnittstelle Serial FPGA configuration + JTAG (IEEE 1149.1) —
Supply Voltage (VCC) 3.3 V 3.0 V to 3.6 V
Programmability In-System Programmable via JTAG —
Daisy-Chain Support Yes (multi-device cascade) —
Data Compression Built-in decompression engine (up to 35% expansion) —
FPGA Compatibility Altera Cyclone, Stratix, ACEX, APEX series —
Gehäuse PQFP-100 (20 x 14 mm) 100-pin PQFP (20 x 14 mm)
Montageart Surface Mount Surface Mount
Betriebstemperatur 0C to +70C (commercial) 0 C to 70 C
Lead-Free / RoHS Depends on date code; verify per lot —
MSL-Level 3 (per JEDEC J-STD-020) —
Programming Cycles 100 typical (per Altera datasheet) —
Packaging Suffix 'T' indicates Tape and Reel —
Max DCLK Frequency [DATA_NEEDED: max DCLK frequency] —
Access Time [DATA_NEEDED: serial access time] 90 ns typical
Programmable Type — In System Programmable
Configuration Clock Frequency — 33 MHz max
On-Chip Decompression — Yes (supports compressed bitstreams)
Flash Read Bandwidth — 160 Mbps (16-bit DQ at 10 MHz)
Configuration Interface — FPP / PS / AS via dedicated FPGA pins
JTAG (IEEE 1149.1) ISP — Supported
Lead Free — Yes (per datasheet)
Packaging — Tray
Supported FPGA Families — ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX

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