EPC16QI100TBAC vs EPC16QC100 Vergleich
Detaillierter Direktvergleich von EPC16QI100TBAC von Altera und EPC16QC100 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPC16QI100TBAC - Altera Enhanced Configuration PROM 16Mb | FPGA
EPC16QI100TBAC ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPC16QI100TBAC | EPC16QC100 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $15,95 | $14,95 |
| Memory Density | 16 Mbit (2 Mbyte) | — |
| Speichertyp | Flash (Enhanced Configuration Device) | Flash Configuration PROM (non-volatile) |
| Versorgungsspannung | 3.3 V | — |
| Configuration Modes | Passive Parallel Synchronous (PPS), Passive Parallel Asynchronous (PPA), Passive Serial (PS) | — |
| Maximum Configuration Clock | 40 MHz | — |
| Number of Configuration Pages | Up to 8 (selectable via PGM[2..0]) | — |
| Gehäuse | 100-pin PQFP (20 x 14 mm) | 100-pin PQFP (20 x 14 mm) |
| In-System Programmable | Yes (via JTAG / IEEE 1149.1) | — |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan and programming) | — |
| Supported FPGA Families | Altera Stratix, Cyclone, Arria series | Stratix, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K |
| Data Compression | Supported (15-30% density gain depending on target FPGA) | — |
| Betriebstemperatur | -40C to +85C (industrial) | -40C to +85C (commercial) |
| Montageart | Surface Mount (PQFP) | Surface Mount |
| MSL-Level | 3 (168 hours) | [DATA_NEEDED: MSL level] |
| Lead-Free / RoHS | Lead-free (per JEDEC J-STD-020); RoHS compliance: [DATA_NEEDED] | — |
| Dynamic Reconfiguration | Yes (page mode via PGM[2..0] pins) | — |
| Configuration Controller | Integrated | Integrated on-die |
| Programming Interface | JTAG / 4-wire passive serial | — |
| Speichergröße | — | 16 Mbit |
| Configuration Clock (max) | — | 33 MHz |
| Schnittstelle | — | Altera enhanced configuration serial interface |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Supply Voltage (VCC) | — | 3.0 V to 3.6 V |
| Cascadable | — | Yes (multi-device chain) |
| Compression Support | — | Yes (Altera enhanced compression) |
| RoHS-Status | — | [DATA_NEEDED: RoHS status] |