EPC16T144C8N vs EPC16C100T Vergleich

Detaillierter Direktvergleich von EPC16T144C8N von Altera und EPC16C100T von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPC16T144C8N EPC16C100T
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $17,80 $16,20
Device Type Enhanced Configuration Device (FPGA boot memory) Enhanced Configuration Device
Memory Density 16 Mb —
Supply Voltage (VCC) 3.0 V to 3.6 V (3.3 V typical) —
Configuration I/O Voltage (VCCIO) 1.8 V / 2.5 V / 3.3 V / 5 V multi-voltage —
Configuration Mode Serial (AS) and Parallel (AP) —
JTAG Interface IEEE Std 1149.1 (IEEE 1532 ISP) —
In-System Programmability Yes (via JTAG) —
On-Chip Decompression Yes (compresses up to ~2x density) —
Speed Grade C8 (8 ns access time) —
Betriebstemperatur 0 C to +85 C (commercial) -40C to +85C (industrial)
Gehäuse 144-LQFP (20 x 20 mm) 100-pin PQFP
Montageart Surface Mount Surface Mount
Compatible FPGA Families Altera Stratix, Cyclone, APEX series —
MSL-Level [DATA_NEEDED: MSL level] —
RoHS-Status [DATA_NEEDED: RoHS compliance - likely compliant, not in data] —
Lead-Free / Halogen-Free [DATA_NEEDED: lead-free status] —
Speichergröße — 16 Mb
Supported FPGAs — Stratix, Cyclone, APEX, Mercury (LUT-based)
Configuration Schemes — PS, PPS, FPP, PPA, JTAG
Schnittstelle — Serial / Parallel / JTAG (IEEE 1149.1)
Core Voltage — 3.3 V
I/O Voltage — 1.8 V to 3.3 V
Programmability — In-system via JTAG
Lead Pitch — 0.65 mm
Compression Support — Yes (Stratix / Stratix II)
Multi-Device Configuration — Yes (daisy chain)
Remote Update — Yes

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