EPC16UI88 vs EPC16UC88N Vergleich
Detaillierter Direktvergleich von EPC16UI88 von Altera und EPC16UC88N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC16UI88 | EPC16UC88N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $5,21 | $9,75 |
| Memory Density | 16 Mb (2 MB) | — |
| Configuration Interface | Altera Passive Serial / Passive Parallel (Sync & Async) / JTAG | — |
| Core Supply Voltage | 3.3 V | — |
| Programming Interface | IEEE 1149.1 JTAG (in-system programmable) | JTAG (in-system) / Serial (in-system) |
| Maximum Configuration Clock | 100 MHz | — |
| Cascading Support | Multi-device configuration chains | — |
| Supported FPGA Families | Altera Cyclone II/III/IV, Stratix II/III, APEX II | — |
| Gehäuse | 88-ball UBGA (Ultra FineLine BGA), 11x8 mm | — |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | -40C to +85C (industrial) | 0 °C to +70 °C |
| Standby Current | [DATA_NEEDED: standby current] | — |
| Active Configuration Current | [DATA_NEEDED: active configuration current] | — |
| Programming Cycles | [DATA_NEEDED: programming endurance cycles] | — |
| RoHS-Status | Compliant | — |
| Configuration Time | [DATA_NEEDED: configuration time for typical 16 Mb bitstream] | — |
| Speichergröße | — | 16 Mbit (16,777,216 bits) |
| Programmable Type | — | In System Programmable |
| Supply Voltage (Vcc) | — | 3.0 V to 3.6 V |
| Configuration Modes | — | Passive Serial (PS), Passive Parallel Synchronous (PPS), Passive Parallel Asynchronous (PPA), JTAG |
| On-Chip Decompression | — | Yes (Altera proprietary) |
| Gehäuse / Bauform | — | 88-UBGA (11x8 mm) / 88-LFBGA |
| Pin-Anzahl | — | 88 |
| Bus-Hold on Data Lines | — | Yes |
| Standby Mode | — | Yes (reduced power consumption) |
| JTAG Boundary Scan | — | Yes (IEEE 1149.1) |
| On-Chip Oscillator | — | Yes (internal configuration clock) |
| Lead-Free / RoHS | — | Lead-Free (per datasheet) |
| Packaging | — | Tray |