EPC1L120 vs EPC1LC20-WCEC52 Vergleich
Detaillierter Direktvergleich von EPC1L120 von Intel und EPC1LC20-WCEC52 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPC1L120 - Altera/Intel Configuration Device 120 kbit Serial | PLCC-20
EPC1L120 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPC1L120 | EPC1LC20-WCEC52 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,20 | $7,45 |
| Speichertyp | Configuration EEPROM | OTP Configuration PROM (Anti-fuse) |
| Memory Capacity | 120 kbit | — |
| Schnittstellentyp | Serial (Altera configuration protocol) | — |
| Betriebsversorgungsspannung | 3.3 V / 5 V | — |
| Output Compatibility | MultiVolt: 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V | — |
| Programmability | In-System via JTAG (IEEE 1149.1) | One-Time Programmable (OTP) |
| JTAG Support | Yes (dedicated JTAG port) | — |
| Gehäuse | PLCC-20 | 20-pin PLCC (J-lead, through-hole, 9x9 mm) |
| Montageart | Surface Mount / Through-Hole (socket) | — |
| Reprogram Cycles | 100 cycles typical | — |
| Betriebstemperatur | -40C to +85C (industrial) | -40C to +85C (industrial) |
| Compatible Altera FPGAs | FLEX 6000, FLEX 8000, MAX 7000, MAX 9000 families | — |
| Cascade Support | Yes (multi-FPGA configuration chains) | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| Speichergröße | — | 1 Mbit (1,048,576 bits) |
| Speicherorganisation | — | 212,942 x 1 bit |
| Schnittstelle | — | Serial (Altera FPP/PS configuration protocol) |
| Configuration Clock (DCLK) | — | 8 MHz maximum |
| Supply Voltage (VCC) | — | 3.3 V |
| I/O Voltage Tolerance | — | 5.0 V (FPGA interface) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Package Mounting | — | Through-hole (also accepts PLCC socket) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Compatible FPGA Families | — | Cyclone, Stratix, APEX, ACEX, MAX series |
| Programming Interface | — | JTAG (IEEE Std 1149.1) ISP |
| Pin-Anzahl | — | 20 |
| Lebenszyklusstatus | — | Obsolete (recommended replacement: EPCQ family or newer serial config devices) |