EPC1LC20CEC vs EPC1LC20-W Vergleich
Detaillierter Direktvergleich von EPC1LC20CEC von Altera und EPC1LC20-W von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC1LC20CEC | EPC1LC20-W |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,20 | $9,85 |
| Speichertyp | OTP Configuration PROM (anti-fuse) | OTP (One-Time Programmable) Configuration PROM |
| Speichergröße | 1 Mbit (1,048,576 bits) | 1 Mbit |
| Configuration Interface | Serial (4-pin: DATA, DCLK, nCS, OE) | — |
| Maximale Taktfrequenz | 8 MHz | — |
| Programming Mode | One-Time Programmable (OTP) | — |
| Gehäuse | 20-pin PLCC (9x9 mm) | 20-PLCC J-lead (9x9 mm) |
| Betriebstemperatur | 0°C to +70°C | — |
| Versorgungsspannung | [DATA_NEEDED: VCC range] | 3.3 V and 5.0 V |
| Configuration Mode | Altera serial slave/master | — |
| Compatible FPGA Families | ACEX 1K, APEX 20K, FLEX 6000, FLEX 8000, FLEX 10K | — |
| Read Endurance | Unlimited | — |
| Program Endurance | 1 cycle (OTP) | — |
| Montageart | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket or direct solder) |
| RoHS-Status | Non-compliant (legacy PLCC package) | Compliant (Pb-free -W finish) |
| Lead-Free | No (contains lead) | — |
| Configuration Clock (DCLK) | — | 8 MHz maximum |
| Schnittstelle | — | Altera serial configuration (DCLK / DATA / nCONFIG / nSTATUS) |
| In-System Programming | — | Yes - IEEE 1149.1 (JTAG) ISP at 3.3 V / 5.0 V |
| Lead Finish | — | Pb-free (matte tin) - "-W" suffix |
| Daisy-Chain Support | — | Yes - multiple EPC1 / EPC2 devices cascade to program larger FPGAs |
| Compression Support | — | Yes - stores compressed Altera FPGA bitstreams |
| Betriebstemperaturbereich | — | [DATA_NEEDED: operating temperature range] |
| Programming Cycles | — | 1 (OTP) |
| Target FPGA Families | — | Cyclone, FLEX 6000 / 10K / 10KE, ACEX 1K, APEX 20K, Mercury |